FAN9611MX【PDF 14/35 页】IC PFC CTLR DUAL BCM 16-SOIC

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Sheet目录38

10页 11页 12页 13页 [14页]15页 16页 17页 18页

?2008 Fairchild Semiconductor Corporation

www.fairchildsemi.com

FAN9611 " Rev. 1.1.7

Figure 20. Error Amplifier Compensation Circuitry

7. Output Voltage Feedback (FB)

The feedback pin receives the divided-down output

voltage of the converter. In regulation, the FB pin should

be 3 V, which is the reference used at the non-inverting

input of the error amplifier. Due to the g

type error

amplifier, the FB pin is always proportional to the output

voltage and can be used for over-voltage protection as

well. A non-latching over-voltage detection circuit

monitors the FB pin and prevents the boost MOSFETs

from turning on when the FB voltage exceeds 3.25 V.

Operation resumes automatically when the FB voltage

returns to its nominal 3 V level.

The open feedback detection circuit is also connected to

the FB pin. Since the output of the boost converter is

charged to the peak of the input AC voltage when power

is applied to the power supply, the detection circuit

monitors the presence of this voltage. If the FB pin is

below 0.5 V, which would indicate a missing feedback

divider (or wrong value causing dangerously-high

regulation voltage), the FAN9611 does not send out

gate drive signals to the boost transistors.

Figure 21. Output-Voltage Feedback Circuit

8. Secondary Output Voltage Sense (OVP)

A second-level latching over-voltage protection can be

implemented using the OVP pin of the controller. The

threshold of this circuit is set to 3.5 V. There are two

ways to program the secondary OVP.

Option 1, as shown in Figure 22, is to connect the OVP

pin to the FB pin. In addition to the standard non-

latching OVP (set at ~8%), this configuration provides a

second OVP protection (set at ~15%), which is latched.

In the case where redundant over-voltage protection is

preferred (also called double-OVP protection), a second

separate divider from the output voltage can be used, as

shown by Option 2 in Figure 22. In this case, the

latching OVP protection level can be independently

established below or above the non-latching OVP

threshold, which is based on the feedback voltage (at

the FB pin).

If latching OVP protection is not desired at all, the OVP

pin should be grounded (Option 3).

Figure 22. Secondary Over-Voltage Protection

Circuit

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